FYL2X
**Compute y **
| Opcode | Instruction | 64-Bit Mode | Compat/Leg Mode | Description |
|---|---|---|---|---|
| D9 F1 | FYL2X | Valid | Valid | Replace ST(1) with (ST(1) ∗ log2ST(0)) and pop the register stack. |
Description
Computes (ST(1) ∗ log2 (ST(0))), stores the result in register ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.
The following table shows the results obtained when taking the log of various classes of numbers, assuming that neither overflow nor underflow occurs.
| ST(0) | |||||||||
|---|---|---|---|---|---|---|---|---|---|
| ST(1) | −∞ | −F | ±0 | +0<+F<+1 | +1 | +F>+1 | +∞ | NaN | |
| −∞ | * | * | +∞ | +∞ | * | −∞ | −∞ | NaN | |
| −F | * | * | ** | +F | −0 | −F | −∞ | NaN | |
| −0 | * | * | * | +0 | −0 | −0 | * | NaN | |
| +0 | * | * | * | −0 | +0 | +0 | * | NaN | |
| +F | * | * | ** | −F | +0 | +F | +∞ | NaN | |
| +∞ | * | * | −∞ | −∞ | * | +∞ | +∞ | NaN | |
| NaN | NaN | NaN | NaN | NaN | NaN | NaN | NaN | NaN |
Table 3-48. FYL2X Results
F Means finite floating-point value.
* Indicatesfloating-pointinvalid-operation(#IA)exception.
** Indicates floating-point zero-divide (#Z) exception.
If the divide-by-zero exception is masked and register ST(0) contains ±0, the instruction returns ∞ with a sign that is the opposite of the sign of the source operand in register ST(1).
The FYL2X instruction is designed with a built-in multiplication to optimize the calculation of logarithms with an arbitrary positive base (b):
logbx := (log2b)–1 ∗ log2x
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
ST(1) := ST(1) ∗ log2ST(0);
PopRegisterStack;
FPU Flags Affected
| C1 | Set to 0 if stack underflow occurred. |
|---|---|
| Set if result was rounded up; cleared otherwise. | |
| C0, C2, C3 | Undefined. |
Floating-Point Exceptions
| #IS | Stack underflow occurred. |
|---|---|
| #IA | Either operand is an SNaN or unsupported format. |
| Source operand in register ST(0) is a negative finite value (not -0). | |
| #Z | Source operand in register ST(0) is ±0. |
| #D | Source operand is a denormal value. |
| #U | Result is too small for destination format. |
| #O | Result is too large for destination format. |
| #P | Value cannot be represented exactly in destination format. |
Protected Mode Exceptions
| #NM | CR0.EM[bit 2] or CR0.TS[bit 3] = 1. |
|---|---|
| #MF | If there is a pending x87 FPU exception. |
| #UD | If the LOCK prefix is used. |
Real-Address Mode Exceptions
Same exceptions as in protected mode.
Virtual-8086 Mode Exceptions
Same exceptions as in protected mode.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
Same exceptions as in protected mode.
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be incomplete or broken in various obvious or non-obvious ways. Refer to Intel® 64 and IA-32 Architectures Software Developer’s Manual for anything serious.