KNOTW/KNOTB/KNOTQ/KNOTD
NOT Mask Register
| Opcode/Instruction | Op/En | 64/32 bit Mode Support | CPUID Feature Flag | Description |
|---|---|---|---|---|
| VEX.L0.0F.W0 44 /r KNOTW k1, k2 | RR | V/V | AVX512F | Bitwise NOT of 16 bits mask k2. |
| VEX.L0.66.0F.W0 44 /r KNOTB k1, k2 | RR | V/V | AVX512DQ | Bitwise NOT of 8 bits mask k2. |
| VEX.L0.0F.W1 44 /r KNOTQ k1, k2 | RR | V/V | AVX512BW | Bitwise NOT of 64 bits mask k2. |
| VEX.L0.66.0F.W1 44 /r KNOTD k1, k2 | RR | V/V | AVX512BW | Bitwise NOT of 32 bits mask k2. |
Instruction Operand Encoding
| Op/En | Operand 1 | Operand 2 |
|---|---|---|
| RR | ModRM:reg (w) | ModRM:r/m (r, ModRM:[7:6] must be 11b) |
Description
Performs a bitwise NOT of vector mask k2 and writes the result into vector mask k1.
Operation
KNOTW
DEST[15:0] := BITWISE NOT SRC[15:0]
DEST[MAX_KL-1:16] := 0
KNOTB
DEST[7:0] := BITWISE NOT SRC[7:0]
DEST[MAX_KL-1:8] := 0
KNOTQ
DEST[63:0] := BITWISE NOT SRC[63:0]
DEST[MAX_KL-1:64] := 0
KNOTD
DEST[31:0] := BITWISE NOT SRC[31:0]
DEST[MAX_KL-1:32] := 0
Intel C/C++ Compiler Intrinsic Equivalent
KNOTW __mmask16 _mm512_knot(__mmask16 a);
Flags Affected
None.
SIMD Floating-Point Exceptions
None.
Other Exceptions
See Table 2-63, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).”
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be incomplete or broken in various obvious or non-obvious ways. Refer to Intel® 64 and IA-32 Architectures Software Developer’s Manual for anything serious.