NOT
One
| Opcode | Instruction | Op/En | 64-Bit Mode | Compat/Leg Mode | Description |
|---|---|---|---|---|---|
| F6 /2 | NOT r/m8 | M | Valid | Valid | Reverse each bit of r/m8. |
| REX + F6 /2 | NOT r/m81 | M | Valid | N.E. | Reverse each bit of r/m8. |
| F7 /2 | NOT r/m16 | M | Valid | Valid | Reverse each bit of r/m16. |
| F7 /2 | NOT r/m32 | M | Valid | Valid | Reverse each bit of r/m32. |
| REX.W + F7 /2 | NOT r/m64 | M | Valid | N.E. | Reverse each bit of r/m64. |
- In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
Instruction Operand Encoding
| Op/En | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
|---|---|---|---|---|
| M | ModRM:r/m (r, w) | N/A | N/A | N/A |
Description
Performs a bitwise NOT operation (each 1 is set to 0, and each 0 is set to 1) on the destination operand and stores the result in the destination operand location. The destination operand can be a register or a memory location.
This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.
In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.
Operation
DEST := NOT DEST;
Flags Affected
None.
Protected Mode Exceptions
| #GP(0) | If the destination operand points to a non-writable segment. |
|---|---|
| If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. | |
| If the DS, ES, FS, or GS register contains a NULL segment selector. | |
| #SS(0) | If a memory operand effective address is outside the SS segment limit. |
| #PF(fault-code) | If a page fault occurs. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #UD | If the LOCK prefix is used but the destination is not a memory operand. |
Real-Address Mode Exceptions
| #GP | If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
|---|---|
| #SS | If a memory operand effective address is outside the SS segment limit. |
| #UD | If the LOCK prefix is used but the destination is not a memory operand. |
Virtual-8086 Mode Exceptions
| #GP(0) | If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
|---|---|
| #SS(0) | If a memory operand effective address is outside the SS segment limit. |
| #PF(fault-code) | If a page fault occurs. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made. |
| #UD | If the LOCK prefix is used but the destination is not a memory operand. |
Compatibility Mode Exceptions
Same as for protected mode exceptions.
64-Bit Mode Exceptions
| #SS(0) | If a memory address referencing the SS segment is in a non-canonical form. |
|---|---|
| #GP(0) | If the memory address is in a non-canonical form. |
| #PF(fault-code) | If a page fault occurs. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #UD | If the LOCK prefix is used but the destination is not a memory operand. |
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be incomplete or broken in various obvious or non-obvious ways. Refer to Intel® 64 and IA-32 Architectures Software Developer’s Manual for anything serious.